This invention relates to transistor amplifiers, and particularly to f.sub.T doubler transistor amplifiers that employ error cancellation circuitry while maintaining substantially unchanged the overall device power dissipation.
It is generally desirable to provide transistor amplifiers capable of operating at high frequencies, particularly for application in electronic systems and instruments such as oscilloscopes and other precision measurement instruments requiring high bandwidth. However, a transistor amplifier's gain is a function of the frequency of the input signal, such that the gain generally is highest for low frequency input signals and decreases as the input signal's frequency increases. Typically, the gain of transistor amplifiers begins to roll off at a frequency determined by, among other things, the input signal's finite source impedance in conjunction with base storage and parasitic junction capacitances of the amplifier's transistors. The roll off characteristically is initially at 6 dB/octave. As the signal frequency increases, additional low-pass filter characteristics often arise, each of which increases the rate of roll off by 6 dB/octave. At some frequency, the current gain typically falls to unity, that frequency typically being designated as f.sub.T.
Accordingly, it is desirable in high frequency applications to employ transistor amplifiers having suitably high f.sub.T characteristics. Such transistor amplifiers may be obtained by using appropriate manufacturing methods, including by using semiconductor materials conducive to high frequency operation as well as by using manufacturing processes and device geometries that reduce the base storage and parasitic junction capacitances of the amplifier's transistors. However, for any particular manufacturing method resulting in a characteristic f.sub.T, proper circuit design of the transistor amplifier can provide an effective f.sub.T that is substantially greater than the characteristic f.sub.T of the amplifier's component transistors.
One transistor amplifier using such a circuit design is described in U.S. Pat. No. 3,633,120, which is assigned to the assignee of the present invention and hereby incorporated by reference. The f.sub.T doubler transistor amplifier described therein includes first and second pairs of transistors where the outputs of the transistor pairs are coupled in parallel and a common input current is provided in series to the four transistors, the effect being to substantially double the current gain. Thence, the f.sub.T characteristic of the transistor amplifier is doubled, that is, the frequency at which practical amplifier operation is achievable is approximately doubled. However, this transistor amplifier is subject to nonlinearity and thermally-induced distortion inherent in the fundamental physical operation of its transistor junctions.
Another f.sub.T doubler transistor amplifier is described in U.S. Pat. No. 4,267,516 which is also assigned to the assignee of the present invention and hereby incorporated by reference. The amplifier comprises a main amplifier and an error correction amplifier connected thereto. The error correction amplifier is introduced to improve linearity while maintaining the enhanced frequency response of the f.sub.T doubler. However, the error correction amplifier requires bias current that is not reused in the main amplifier. Consequently, overall device power dissipation is increased in employing the error correction amplifier.
Another f.sub.T doubler transistor amplifier is described in U.S. Pat. No. 4,774,475, which is also assigned to the assignee of the present invention and hereby incorporated by reference. The amplifier employs a main amplifier and two error correction amplifiers, wherein the error correction amplifiers reuse the main amplifier's bias currents. The error correction amplifiers are in series connection with the main amplifier so as to cancel nonlinearities and thermally-induced distortion. The current used to bias the error correction amplifiers is reused in biasing the main amplifier. However, the error correction amplifiers require a controlling voltage which is generated by a pair of transistors, those transistors being matched and biased by matched current sources. The currents of these current sources are not reused in the main amplifier. Moreover, the main amplifier employs a center-tap to which a reference signal is applied so as to drive the mid-point of the main amplifier, that is, to balance the bases of the internal transistors of the two differential pairs of the main amplifier. The continuing accuracy of this reference signal is significant to the proper functioning of the error correction amplifiers, but is difficult to maintain.
Accordingly, there is a need for an improved transistor amplifier which provides the enhanced frequency response of an f.sub.T doubler transistor amplifier while also overcoming nonlinearities and thermally-induced distortion, without substantially changing the overall device power dissipation.